Make Verification Fun Again with Python and cocotb

Описание: Make Verification Fun Again with Python and cocotb
Getting complex designs to work has never been easy, and constraint random verification with SystemVerilog and UVM has been the go-to solution in ASIC designs for years now. At the same time, many developers are overwhelmed by the complexity of UVM and are looking for alternative verification solutions. This search has come to an end: with cocotb, developers can productively write verification code in Python, while continuing to use their Verilog or VHDL simulator of choice for the hardware design
Philipp is a curious engineer at the intersection of hardware and
software, design and verification, with a strong interest in open source
and development methodology. After his Diploma at Technical University
Munich he researched novel ways to observe and diagnose the software
execution on embedded systems, for which he was awarded a Dr.-Ing. (PhD-equiv.) in Electrical Engineering. After three years architecting and developing a
security chip in Cambridge, UK, he joined IBM as verification engineer. Philipp is one of the maintainers of the free and open cocotb project and founding director of the FOSSi Foundation