Cadence Virtuoso: Is Your Layout Actually Correct? Let Assura decide! | CMOS Inverter | VLSI Lab #9

Описание: 🚀 *CMOS Inverter : DRC, LVS & QRC*

Think your CMOS layout is finished? Think again.

In Part 2 of our CMOS Inverter series, we move beyond the drawing board and put our design to the ultimate test using Assura tools within Cadence Virtuoso.

▶️ DRC (Design Rule Check) : Is our layout manufacturable? We'll find and fix spacing, width, and enclosure errors.

▶️ LVS (Layout vs. Schematic) : Does our physical layout match the intended circuit? We'll prove our inverter's connectivity and devices are correct.

▶️ QRC (Parasitic Extraction) : What are the real-world performance impacts of our wires? We'll extract RC parasitics to understand timing and signal integrity.

By the end of this video, you won’t just have a layout; you’ll have a verified, production-ready CMOS inverter cell and the essential skills to use ASSURA for any future block.

📌 What You’ll Learn :
̣
👉🏻 How to set up and run ASSURA DRC/LVS decks.
👉🏻 The methodology to debug and fix common DRC and LVS errors.
👉🏻 The importance of parasitic extraction (QRC) for accurate performance analysis.
👉🏻 The complete verification workflow used by industry IC designers.

*Tools Used: Cadence Virtuoso Layout Suite, ASSURA DRC/LVS/QRC.*

*Pre-requisite*

▶️ *Watch Part 1 where we built the CMOS inverter layout from scratch*:

   • Cadence Virtuoso: CMOS Inverter Layout Des...  

📌 *Complete Cadence Lab Course*

   • Hands-On VLSI Design: Cadence Virtuoso Lab...  

📌 * Complete VLSI Design Theory Course*

   • VLSI Design Fundamentals : From Transistor...  

🗣️ Who is this for?

VLSI students, aspiring layout engineers, and anyone curious about the professional IC design verification process.

⏰ Chapters:
00:06 - ASSURA: Overview in Virtuoso
02:45 - Design Rules & Why we should follow them?
05:06 - ASSURA Tool Flow
05:21 - Setting Up the Path for ASSURA Technology File
08:38 - Running DRC: Setting Up Rules
12:51 - DRC Errors & How to fix them!
16:25 - Running LVS: Setting Up Rules
19:35 - Parasitic Extraction (QRC) Setup & Output
21:51 - What's av_extracted? Where are the Parasitics???
26:20 - Preview of What's Next!!!

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