KVM Device Assignment for Virtual Machines Using the RISC-V IOMMU

Описание: RISC-V Summit Europe presentation by Andrew Jones, Principal Software Engineer at Ventana Micro.

Demo Theatre Talk at RISC-V Summit Europe 2024.
The RISC-V IOMMU provides capabilities supporting device assignment, which is the provision of host devices to virtual machines where they appear to the guest operating systems as though they have been physically attached. Beyond the restriction of device DMAs to guest memory, the RISC-V IOMMU, in conjunction with the RISC-V AIA, additionally supports directing interrupts to guest VCPUs, which is a feature also referred to as irqbypass. We demonstrate device assignment with the RISC-V IOMMU including its irqbypass support on a Linux/KVM host running on a QEMU machine model.

Ventana Micro: High Performance RISC-V Leader

Ventana Micro’s global team is delivering a family of no-compromise, high-performance RISC-V data center-class CPUs with extensible instruction set capability delivered in the form of multi-core chiplets or core IP for high-performance applications in the cloud, enterprise data center, hyperscale, 5G, edge compute, AI/ML and automotive markets.

Headquartered in Cupertino, Ventana Micro Systems was founded in 2018 to revolutionize the processor market by offering high-performance, extensible and secure compute chiplets based on RISC-V’s open architecture.

Ventana is a member of the RISC-V International Board of Directors and its Technical Steering Committee.

Web: https://www.ventanamicro.com/
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The Ventana Veyron series is the industry’s highest performance RISC-V processors, and is supported by all the necessary system IP needed to create advanced, customized computing platforms.

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Our technology addresses some of the biggest challenges in industries such as data center, automotive, 5G, AI, and client computing by enabling the quick and efficient creation of RISC-V platforms optimized for their most demanding applications.