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IEEE 2024 - A low-power 8-bit 1-MS/s single-ended SAR ADC in 130-nm CMOS for medical devices

Abstract:Rapid advancements in micro-machining and microelectronics over the last few years
have accelerated the growth of implanted medical devices that greatly improve a person’s life. These devices first gather the signals from different nodes in/on the body,
and then, they condition, multiplex, and digitize the signals. Thus, an analog-to-digital
converter (ADC), which must continuously convert a variety of analog electro physiological signals to digital codes, is one of the most crucial and power-hungry components. For implantable medical devices, the successive approximation register (SAR)
ADC is a good choice. In this paper, a low-power single-ended SAR ADC architecture is proposed to offer good compromises between power efficiency, conversion
accuracy, and design complexity. The proposed architecture supports 8-bit resolution
at a sampling rate of 1 MS/s. Using a 130-nm CMOS process with 1.2 V supply voltage,
an effective number of bits (ENOB) of 7.3 dB is achieved while 28.5 μW power is consumed. The ADC core only occupies an active area of about 197 μm×377 μm.

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