Transistor Sizing - Static CMOS Design | Know - How
Автор: Electronics Insight
Загружено: 2020-09-20
Просмотров: 46919
Описание:
This video on "Know-How" series helps you to calculate the aspect ratio (or) (W/L) ratio of complex logic function implemented in static CMOS design. The video solves two different complex logic functions (1. F = [(A+B).(C+D)]'; 2. F = [(A.B)+C]') with respect to the unit CMOS Inverter design.
To understand the static CMOS design:
• Static CMOS VLSI Design | Learn before you...
To know about the transistor sizing of basic gates:
• Transistor Sizing - Catalog of Skewed Gate...
TimeCodes:
Introduction to Transistor Sizing: (00:00)
Static CMOS Design - F = [(A+B).(C+D)]' : (01:25)
PDN Sizing for F = [(A+B).(C+D)]' : (03:20)
PUN Sizing for F = [(A+B).(C+D)]' : (08:54)
Static CMOS sizing for F = [(A+B).(C+D)]' : (11:33)
PDN Sizing for F = [(A.B)+C]' : (11:55)
PUN Sizing for F = [(A.B)+C]' : (14:19)
Static CMOS sizing for F = [(A.B)+C]' : (16:34)
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