Gate 2005 pyq CAO | A hardwired CPU uses 10 control signals S1 to S10, in various time steps T1 to
Автор: Gate CS pyqs - the other way[Hin]
Загружено: 2022-05-01
Просмотров: 143
Описание:
A hardwired CPU uses 10 control signals S1 to S10, in various time steps T1 to T5, to implement 4 instructions I1 to I4 as shown below:
T1 T2 T3 T4 T5
I1 S1,S3,S5 S2,S4,S6 S1,S7 S10 S3,S8
I2 S1,S3,S5 S8,S9,S10 S5,S6S7 S6 S10
I3 S1,S3,S5 S7,S8,S10 S2,S6,S9 S10 S1,S3
I4 S1,S3,S5 S2,S6,S7 S5,S10 S6, S9 S10
Which of the following pairs of expressions represent the circuit for generating control signals S5 and S10 respectively?
((Ij+Ik)Tn indicates that the control signal should be generated in time step Tn if the instruction being executed is Ij or lk)
(A) S5=T1+I2⋅T3 and S10=(I1+I3)⋅T4+(I2+I4)⋅T5
(B) S5=T1+(I2+I4)⋅T3 and S10=(I1+I3)⋅T4+(I2+I4)⋅T5
(C) S5=T1+(I2+I4)⋅T3 and S10=(I2+I3+I4)⋅T2+(I1+I3)⋅T4+(I2+I4)⋅T5
(D) S5=T1+(I2+I4)⋅T3 and S10=(I2+I3)⋅T2+I4⋅T3+(I1+I3)⋅T4+(I2+I4)⋅T5
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