LOCA series: TuRTLe: Artificial Intelligence for Chip Design research at BSC
Автор: BSC CNS
Загружено: 2026-03-13
Просмотров: 21
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Speaker:
Emanuele Parisi, Recognized researcher, AI4S Fellow
Abstract:
Advancements in large language models (LLMs) have opened new opportunities across a wide range of domains, including Electronic Design Automation (EDA), where they are increasingly explored as a means to enhance engineering productivity in chip design and verification. Despite encouraging progress enabled by prompt engineering techniques and domain-specific fine-tuning, significant challenges remain before LLMs can be reliably integrated into production-grade EDA workflows. This talk presents recent advances in AI for chip design research at the Barcelona Supercomputing Center. We will discuss two recent scientific contributions emerging from this line of work: TuRTLe, a framework for evaluating LLM performance on chip design tasks; and NotSoTiny, a live RTL code completion benchmark designed to scale existing RTL datasets while maintaining data freshness to mitigate dataset contamination. The talk will conclude with an overview of ongoing research efforts and a discussion of future directions in this rapidly evolving field.
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