Tutorial: How to make Program Logic project. Xilinx Zynq-7010, VIVADO 2020.1, Vitis 2020.1
Автор: CellphoneCarAlarmCom
Загружено: 2021-01-16
Просмотров: 828
Описание:
The project contains: Switchs_and_LEDs.vhd
3 inputs connected to 3 Switches
3 outputs connected to RGB LED
ARM used for load FPGA only
Create a project in Vivado
Add Switchs_and_LEDs.vhd file
Select on boards tab the Z-turn Board
Creating a Block Design
Create a Zynq Processing System
Run Block Automation
Disable several block of Zynq
Add a VHDL module to the schematic
Add external input and output
Creating a Hardware Wrapper
Run Synthesis
Assigning Pin to Inputs and Outputs
Save constraints file
Generate Bitstream
Export Hardware
Launch VITIS
Creating a Platform Project
Create “Hello world” PS project
Build project, Program FPGA
Optionally Create boot image that can be loaded to SD card
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