William & Mary | CSCI654 Advanced Computer Architecture | 03 Circuit Blocks
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Загружено: 2026-02-23
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William & Mary | CSCI 654 Advanced Computer Architecture | Spring 2026 | Yifan Sun
This is the third lecture of the CSCI654 Advanced Computer Architecture course. We focused on combinational logic design, starting with the systematic approach of going from a truth table to a boolean expression to a circuit. We used Karnaugh maps to simplify boolean expressions. We then built increasingly complex components starting from the half adder, which adds two bits using an XOR and an AND gate, to the full adder that handles a carry-in, and then chained four full adders together to make a 4-bit adder. We also covered multiplexers and encoders/decoders. The second half of the lecture introduced sequential logic, beginning with SR latches that can hold a signal, then D latches that simplify the interface to a single data input. We identified the problem of transparent periods in D latches and solved it with the master-slave D flip-flop, which only captures data on clock rising edges. We finished with the rules of synchronous logic design: every element must be either combinational logic or a register, all registers share the same clock, and every cyclic path must contain at least one register. (edited)
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