Asic Engineer role

Описание: Design RTL ASIC Engineer/ Lead
Location: Bangalore, Hyderabad
Experience:- 4 to 20 Years
Skills : RTL ASIC, CDC, Lint, integration, Micro-architecture , Timing &Synthesis, scripting (TCL/Perl/ Python)

RTL ASIC front end design with Microarchitecture and Verilog coding . (4 -8 yr)
-- MAS development
-- RTL coding
-- Development of module, feature addition
-- Experience in Medium-complexity protocol
-- Well familiar in slow speed protocols like I2C/SPI/UART
-- Familiar in AMBA bus protocols (APB, AHB, AXI)
-- Has experience in Quality check flows (Lint/CDC)

9+ yr – BLR
-- Very strong in RTL coding
-- Micro-Architecture (uArch) development
-- Owned and delivered a Sub-system, Top level in a SoC project
-- Has expertise in IP design, Sub-system design , SoC integration
-- Has successfully lead a team of engineers and completed the deliverables on time


Interested Resouces kindly share Resume to [email protected] and contact on 6361542656. Kindly refer to friends and colleagues

Regards,
Gayatri
6361542656