Talk#1, CMOS Industry compatible fabrication process for superconducting qubits, with Jeroen Verjauw

Описание: Speaker : Jeroen Verjauw
Host : Anuj Aggarwal
Article title: Path toward manufacturable superconducting qubits with relaxation times exceeding 0.1 ms
Article link: https://www.nature.com/articles/s41534-022...

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00:00 Intro
03:07 Motivation
10:56 Manufacturable Overlap Aluminum junctions
15:19 Coherence Times
20:38 Dry etch vs Wet Etch
22:41 Geometry Loss dependence
29:22 Interface Characterization
32:16 Conclusions
33:48 Q&A
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Abstract: As the superconducting qubit platform matures towards ever-larger scales in the race towards a practical quantum computer, limitations due to qubit inhomogeneity through lack of process control become apparent. To benefit from the advanced process control in industry-scale CMOS fabrication facilities, different processing methods will be required. In particular, the double-angle evaporation and lift-off techniques used for current, state-of-the-art superconducting qubits are generally incompatible with modern-day manufacturable processes. Here, we demonstrate a fully CMOS compatible qubit fabrication method, and show results from overlap Josephson junction devices with long coherence and relaxation times, on par with the state-of-the-art. We experimentally verify that Argon milling—the critical step during junction fabrication—and a subtractive-etch process nevertheless result in qubits with average qubit energy relaxation times T1 reaching 70 µs, with maximum values exceeding 100 µs. Furthermore, we show that our results are still limited by surface losses and not, crucially, by junction losses. The presented fabrication process, therefore, heralds an important milestone towards a manufacturable 300 mm CMOS process for high-coherence superconducting qubits and has the potential to advance the scaling of superconducting device architectures.