Video Interfacing with Zynq (FPGAs): Part 6 Combining Image Processing and Video Output
Автор: Vipin Kizheppatt
Загружено: 2020-04-14
Просмотров: 10320
Описание:
#Xilinx #Zedboard #VDMA #SDK
In this tutorial we combine the previously developed image processing IP (sobel edge detector) and the Video display system
Source code
https://github.com/vipinkmenon/imageP...
Prerequisite Videos
Part 1 Intro: • Video Interfacing with Zynq (FPGAs): Part ...
Part 2: AXI4 to Stream Video: • Video Interfacing with Zynq (FPGAs): Part ...
Part 3: VDMA : • Video Interfacing with Zynq (FPGAs): Part ...
Part 4: Software for VDMA : • Video Interfacing with Zynq (FPGAs): Part ...
Part 5: Displaying image on monitor • Video Interfacing with Zynq (FPGAs): Part ...
Developing edge detection IP
• Image Processing on Zynq (FPGAs) : Part 9 ...
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