Super Fly! -- Brad Nelson -- 2025-09-26

Описание: The flyweight design pattern is a technique for reducing memory use when applying an object-oriented approach to problems that involve a large number of objects. While working on a Forth implementation of FPGA synthesis for the ICE40, I discovered an even more compact sort of flyweight that works well for representing FPGA routes, made possible because of Forth's ability to redefine everything, including how dynamic dispatch works. I'll present my findings and demonstrate the current state of my Forth FPGA synthesis tool.

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