Prof. Dr. Ben H. Juurlink
The Embedded Systems Architecture (Architektur eingebetteter Systeme, AES) group of Technical University of Berlin (Technische Universität Berlin, TUB) investigates and teaches the field of computer architecture, ranging from low-power embedded systems to massively parallel high-performance systems. We focus on the design, implementation and optimization of high performance embedded systems; taking into account the interactions between applications, tools, and architectures. In addition to high performance we also aim at improving energy efficiency, programmability, predictability, error resilience, as well as other features of emerging computer systems.
http://www.aes.tu-berlin.de/menue/home_aes/
1 1 5 CPU Performance Equation
1 2 2 MIPS64 Addressing Modes and Instruction Formats
1 2 3 MIPS64 Operations
1 3 1 Pipelining Principles
1 3 3 MIPS Pipeline Features and Pipeline Hazards
Test 1 5 1 Caches and the Principle of Locality
Test 1 5 2 Direct mapped Cache Organization
Test 1 5 3 Hit or Miss Example
Test 1 5 4 Basic Cache Optimizations to Reduce Miss Rate
Test 1 5 5 Cache Equations for Set Associative Caches
Test 1 5 6 Cache Metrics and Improving AMAT
Test 1 5 7 Reduce Miss Penalty by Multilevel Cache
Test 1 5 8 Give Priority to Read Misses
Test 2 3 1 Introduction to SIMD
Test 2 3 2 SIMD Register File, Data Types, and Instructions
Test 2 3 3 SIMD Multiplication Instructions
Test 2 3 4 Special Purpose Instructions & Data Conversions
Test 2 3 5 Data Alignment and Reordering
Test 2 3 6 SIMD Control Flow
Test 2 4 1 TLP Motivation and Introduction
Test 2 4 2 SW and HW Multithreading
Test 2 4 3 Introduction to Block Multithreading
Test 2 4 5 Introduction to Interleaved Multithreading
Test 2 4 6 Examples of Interleaved Multithreading
Test 2 4 7 Introduction to Simultaneous Multithreading
Test 2 4 8 Examples of Simultaneous Multithreading
1 3 5 Load use Data Hazard
1 3 8 Scheduling Instructions for Branch Delay Slot
1 3 10 Excercise
1 4 1 Multicycle Operations