VerilogHDL

Verilog HDL

Open source vlsi tools

This channel aims to help enthusiasts to learn 1. Verilog HDL 2. What is a simulation and what types of simulations are there? 3. What is meant by Synthesis 4. Knowledge of various EDA Tools. 5. What is meant by the FPGA design approach and ASIC design approach. //** Please contact for any related assistance 9949-426-362 **//

6 fulladder and its testbench demo on iverilog

6 fulladder and its testbench demo on iverilog
5 booth multiplication algorithm

5 booth multiplication algorithm
4 Qflow discussion contd1

4 Qflow discussion contd1
3 linux basic commands and qflow

3 linux basic commands and qflow
2 iverilog gtkwave demo

2 iverilog gtkwave demo
1 LTSpice demo

1 LTSpice demo
Session 6 - 4-bit Adder-cum-subtractor

Session 6 - 4-bit Adder-cum-subtractor
Session5 - Blocking vs Non-blocking; Binary-to-BCD

Session5 - Blocking vs Non-blocking; Binary-to-BCD
Session4 - structural modelling and casex example

Session4 - structural modelling and casex example
Pynq Jupyter

Pynq Jupyter
ILA and VIO @OU

ILA and VIO @OU
Session3 - Encoders

Session3 - Encoders
Session2 - MUX and Dataflow modelling

Session2 - MUX and Dataflow modelling
Session1 - Intro- Full adder using two half adders

Session1 - Intro- Full adder using two half adders
Exp9 Left_Shift_Register_4bit

Exp9 Left_Shift_Register_4bit
LTSpice Exp4 Half adder

LTSpice Exp4 Half adder
LTSpice Exp3 NOR gate

LTSpice Exp3 NOR gate
LTSpice Exp2 NAND gate

LTSpice Exp2 NAND gate
LTSpice Exp1 Inverter

LTSpice Exp1 Inverter
Exp8 up counter

Exp8 up counter
Exp7 D flipflop

Exp7 D flipflop
Exp5 3bit multiplier using Gatelevel modelling[part2 - code]

Exp5 3bit multiplier using Gatelevel modelling[part2 - code]
Exp5 3bit multiplier using Gatelevel modelling[part1-Theory]

Exp5 3bit multiplier using Gatelevel modelling[part1-Theory]
Exp4 4bit addercumsub using 1bit fa

Exp4 4bit addercumsub using 1bit fa
Exp3 4bit rca using 1bit fa part2[Code]

Exp3 4bit rca using 1bit fa part2[Code]
Exp3 4bit rca using 1bit fa part1[Theory]

Exp3 4bit rca using 1bit fa part1[Theory]
Exp2 mux4x1 using mux2x1 - Contd. [with how to display in console]

Exp2 mux4x1 using mux2x1 - Contd. [with how to display in console]
Exp2 mux4x1 using mux2x1

Exp2 mux4x1 using mux2x1
Exp1 fa1bit using 2 ha - contd.

Exp1 fa1bit using 2 ha - contd.
Exp1 tools and 1bit fa logic

Exp1 tools and 1bit fa logic